Prediction of security vulnerabilities in hardware designs is of critical importance for manufacturers, since once fabricated, a hardware implementation is impossible to patch. Furthermore, vulnerabilities in hardware implementations (including side-channel leaks and fault injection vulnerabilities) can be used to effectively bypass security mechanisms and put chips or systems at major risk.
Challenges in hardware security
Ensuring the security of modern hardware designs is challenging due to their complexity, aggressive time-to-market demands, and the variety of attacks introduced against hardware designs. Predicting and eliminating side-channel leaks requires a dedicated team with a broad range of expertise, such as signal processing, statistics, and cryptography, as well as keeping up with the development of a very dynamic research area - adding to the costs of secure hardware development. Existing commercial electronic design automation tools for hardware design can optimise implementations with respect to power consumption, silicon area and operation speed, but have no built-in support for physical security.
Project aim
The aim of this project is to provide the semiconductor industry and the security evaluation industry with a set of metrics and a framework to aid analysis and mitigation of hardware security vulnerabilities.
